{"product_id":"74ls76-ic","title":"74ls76 Ic","description":"\u003cp\u003eThis device \u003cstrong\u003e7476\u003c\/strong\u003e contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop after a complete clock pulse. While the clock is LOW the slave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master.\u003cbr\u003e\nWhile the clock is HIGH the J and K inputs are disabled.\u003c\/p\u003e\n\u003cp\u003eFeatures\u003c\/p\u003e\n\u003cp\u003e1. Output Drive Capability: 10 LSTTL Loads\u003cbr\u003e\n2. Outputs Directly Interface to CMOS, NMOS and TTL\u003cbr\u003e\n3. Operating Voltage Range: 2 to 6V\u003cbr\u003e\n4. Low Input Current: 1mA\u003cbr\u003e\n5. High Noise Immunity Characteristic of CMOS Devices\u003cbr\u003e\n6. In Compliance With the JEDEC Standard No. 7A Requirements\u003cbr\u003e\n7. Chip Complexity: 100 FETs or 25 Equivalent Gates\u003c\/p\u003e\n\u003cp\u003e\u003cimg src=\"https:\/\/cdn.shopify.com\/s\/files\/1\/0965\/3623\/2249\/files\/74762.jpg?v=1789246224\" alt=\"74ls76 Ic\" data-files=\"74762.jpg\" loading=\"lazy\"\u003e\u003c\/p\u003e\n\u003cp\u003e\u003cimg src=\"https:\/\/cdn.shopify.com\/s\/files\/1\/0965\/3623\/2249\/files\/74761.jpg?v=1789246226\" alt=\"74ls76 Ic\" data-files=\"74761.jpg\" loading=\"lazy\"\u003e\u003c\/p\u003e","brand":"Electronics Hub","offers":[{"title":"Default Title","offer_id":54467422191929,"sku":"product-16445","price":0.0,"currency_code":"PKR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0965\/3623\/2249\/files\/74762.webp?v=1789246231","url":"https:\/\/electronicshub.pk\/products\/74ls76-ic","provider":"Electronics Hub","version":"1.0","type":"link"}